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Espressif Systems /ESP32-S3 /RTC_CNTL /ANA_CONF

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Interpret as ANA_CONF

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31 2827 2423 2019 1615 1211 87 43 0 0 0 0 0 0 0 0 00 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 (I2C_RESET_POR_FORCE_PD)I2C_RESET_POR_FORCE_PD 0 (I2C_RESET_POR_FORCE_PU)I2C_RESET_POR_FORCE_PU 0 (GLITCH_RST_EN)GLITCH_RST_EN 0 (SAR_I2C_PU)SAR_I2C_PU 0 (ANALOG_TOP_ISO_SLEEP)ANALOG_TOP_ISO_SLEEP 0 (ANALOG_TOP_ISO_MONITOR)ANALOG_TOP_ISO_MONITOR 0 (BBPLL_CAL_SLP_START)BBPLL_CAL_SLP_START 0 (PVTMON_PU)PVTMON_PU 0 (TXRF_I2C_PU)TXRF_I2C_PU 0 (RFRX_PBUS_PU)RFRX_PBUS_PU 0 (CKGEN_I2C_PU)CKGEN_I2C_PU 0 (PLL_I2C_PU)PLL_I2C_PU

Description

analog configure register

Fields

I2C_RESET_POR_FORCE_PD

force down I2C_RESET_POR
I2C_RESET_POR_FORCE_PU

force on I2C_RESET_POR
GLITCH_RST_EN

enable clk glitch
SAR_I2C_PU

PLLA force power up
ANALOG_TOP_ISO_SLEEP

PLLA force power down
ANALOG_TOP_ISO_MONITOR

PLLA force power up
BBPLL_CAL_SLP_START

start BBPLL calibration during sleep
PVTMON_PU

1: PVTMON power up, otherwise power down
TXRF_I2C_PU

1: TXRF_I2C power up, otherwise power down
RFRX_PBUS_PU

1: RFRX_PBUS power up, otherwise power down
CKGEN_I2C_PU

1: CKGEN_I2C power up, otherwise power down
PLL_I2C_PU

power on pll i2c

Links

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Register License

Copyright 2024 Espressif Systems (Shanghai) PTE LTD

Licensed under the Apache License, Version 2.0 (the “License”); you may not use this file except in compliance with the License. You may obtain a copy of the License at

http://www.apache.org/licenses/LICENSE-2.0

Unless required by applicable law or agreed to in writing, software distributed under the License is distributed on an “AS IS” BASIS, WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the License for the specific language governing permissions and limitations under the License.

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Register Reference

https://github.com/cmsis-svd/cmsis-svd-data